BoolSi announced that it has raised $6 million in seed funding to build a compiler that enables software engineers to create custom hardware accelerators without needing chip design expertise.
The round was led by Fine Structure Ventures, an F-Prime fund, with participation from Pillar VC, Fifth Quarter Ventures, and Coalition Ventures.
BoolSi was founded by Mihailo Isakov, CEO of the company. The company is focused on helping engineers generate custom FPGA accelerators and drivers from hotspots in C, C++, or Rust.
The company is addressing a technical challenge in computing: general-purpose CPUs are flexible but not optimized for every workload, while custom silicon can run fixed workloads much faster. However, designing custom silicon traditionally requires specialized hardware design expertise and long development cycles.
BoolSi said its platform enables engineers to feed in a performance-critical code path and receive a custom FPGA accelerator and driver in minutes instead of months.
The company’s approach uses machine learning models to learn what a program does and then converge into fully accurate digital circuits that can be verified with standard chip-design toolchains.
BoolSi said its early work has already shown promising performance gains. On a 10,000-line C regex library, one generated accelerator ran 8x faster than gcc -O3 on an ARM core, while eight accelerators reached 63x performance.
The company said the resulting circuit is treated as a build artifact and checked against the original C code.
BoolSi is hiring across compiler engineering, machine learning, and hardware, and its private beta is expected to open this quarter.
KEY QUOTE:
“Software engineers can already get 100x speedups on their hot loops. They just have to spend a decade learning to design chips first. I started BoolSi to build the compiler that removes that prerequisite. What BoolSi does: you feed it a hotspot in C, C++, or Rust, and out comes a custom FPGA accelerator and driver in minutes instead of months. We don’t compile your code’s syntax. We train ML models to learn what the program actually does, using an architecture where those networks converge into 100% accurate digital circuits you can verify with the standard chip-design toolchain. The AI isn’t designing a chip. The AI gets solidified into a chip.”
Mihailo Isakov, CEO of BoolSi
