At Flash Memory Summit, Samsung, MemVerge, H3 Platform, and XConn recently unveiled a 2TB Pooled CXL Memory System. This system addresses performance challenges faced by highly distributed AI/ML applications. The challenges include issues like spilling memory to slow storage when the main memory is full, excessive memory copying, I/O to storage, serialization/deserialization, and Out-of-Memory errors that can crash an application.
In modern applications like AI/ML, demand is exploding for memory capacity and composability of memory in distributed computing environments. But demand cannot be met because the capacity and composability of today’s system architecture are severely limited by the tight coupling between CPU and Memory.
So open CXL specifications were developed to increase the capacity and composability of memory, and products have emerged that are being integrated into concept solutions.
Samsung drove the creation of the world’s first CXL memory module. And MemVerge developed Project Endless Memory, the world’s first elastic memory software to scale memory capacity on demand. Plus, XConn delivered the industry’s first CXL switch, and H3 Platform integrated the hardware and software components. These four companies co-engineered a 2U rack-mountable system with a 2TB memory capacity that can be dynamically allocated to the computing hosts to meet the demands of modern applications.
These companies co-engineered 2TB Pooled CXL Memory System showcased at Flash Memory Summit features 8 Samsung 256GB CXL Memory Modules and the XConn XC50256 CXL 2.0 switch with 256 lanes. And H3 Platform integrated hardware and firmware into a system that can be connected to as many as eight computing hosts. MemVerge’s Project Endless Memory software runs seamlessly on the hardware system and helps users visualize, pool, tier, and dynamically allocate memory to the connected hosts.
Samsung CXL Memory Modules are driving the movement toward the commercialization of CXL, which will enable extremely high memory capacity with low latency in IT systems.
The XC50256 is considered the world’s first CXL 2.0 and PCIe Gen5 switch IC. The switch features up to 32-ports that can be bifurcated into 256 lanes with a total of 2,048GB/s switching capacity and low port-to-port latency. The Samsung CXL memory and XConn CXL switch come together in a 2U rackmount system.
The co-engineered demonstration system could be pooled, tiered with main memory, and dynamically provisioned to applications with Memory Machine X software from MemVerge and its elastic memory service. And the Memory Viewer observability service displays the physical topology and a heat map of memory capacity and bandwidth usage by app.
KEY QUOTES:
“The concept system unveiled at Flash Memory Summit is an example of how we are aggressively expanding its usage in next-generation memory architectures. Samsung will continue to collaborate across the industry to develop and standardize CXL memory solutions, while fostering an increasingly solid ecosystem.”
— JS Choi, vice president of New Business Planning Team at Samsung Electronics
“Flash Memory Summit is the debut for systems using our switch ASIC. This generation of systems will deliver to AI applications lower latency and higher bandwidth than the previous generation of systems using our FPGA-based switches.”
— XConn CEO Gerry Fan
“H3 is leading the development of systems integrating a full stack of CXL hardware and software. Our leadership is highlighted by the H3 Fabric Manager which presents a friendly interface to the powerful CXL resources in the system.”
— Brian Pan, CEO and co-founder of H3 Platform
“Modern AI applications require a new memory-centric data infrastructure that can meet the performance and cost requirements of its data pipeline. Hardware and software vendors in the CXL Community are co-engineering such memory-centric solutions that will deeply impact our future.”
— Charles Fan, CEO and co-founder of MemVerge
